Interact-13: Workshop on Interaction
Between Compilers and Computer Architecture
 

Held in conjunction with HPCA-15

Raleigh, North Carolina, February 15, 2009

 

Technical Program

 

            Effective compilers allow more efficient execution of application programs on a given computer architecture. On the other hand, well-conceived architectural features can support more effective compiler optimization techniques. Good interaction between compilers and computer architectures is the key to successful design of highly efficient and effective computer systems. This workshop is to promote new ideas and present recent developments in compiler techniques and computer architectures that enhance each other¡¯s capabilities and performance. Papers are solicited on any aspect of interaction between compilers and architectures in the design of microprocessors, multiprocessors, and other parallel computer systems.

 

Potential topics, not limited to:

• Processor reliability enhancement

•  Improved timing analysis and predictability

• Secure, dependable computing

• Managed and unmanaged run-time support

• Dynamic compilation and optimization

•  Task synchronization and scheduling

• System virtualization

• Efficient I/O support

• Parallelism enhancement and exploitation

• Memory, cache, and register management

• Multi-core software and compilation

• Code optimization and generation

• Low power architecture and software

•  Debugging, verification and validation

• Processor variation interactions with software

• Network on chips

Technical program:

            advanced program. pdf


Organization committee:

            Steering committee chair: Bruce Childers (University of Pittsburgh)
            General chair:         Jun Yang (University of Pittsburgh)
            Program chair:       Youtao Zhang (University of Pittsburgh)
 

Program committee:

            Sangyeun Cho        University of Pittsburgh
            Wei-Chung Hsu      University of Minnesota

            Michael Huang       University of Rochester

            David Kaeli              Northeastern University
            Hsien-Hsin Lee        Georgia Institute of Technology
            Yunheung Paek      Seoul National University

            Alex M. Settle          Intel Corp.

            David Whalley        Florida State University

            Youfeng Wu            Intel Corp.
            Xiaotong Zhuang    IBM T.J. Waston Research

 

Submission guidelines:

            The program committee invites authors to submit up to 5000 words, in double column, 10-point or larger, single spacing, up to 10 pages of manuscript, describing original, unpublished recent results related to the workshop theme. Submission must be in pdf format and emailed to zhangyt@cs.pitt.edu. The submission should also include the contact author's email address on the front page.

 

Important deadlines:

            Paper submission:                             December 14, 2008 (extended)

            Acceptance notification:                    January 11, 2009 January 15, 2009

            Final version due by:                         January 25, 2009