CS447 Homework 4 - Due in Class - April 3
  1. You have been asked to implement the logic circuitry for a turn signal device in a car. There are two inputs - LON and RON. When LON is asserted, the left light should be blinking, and when RON is asserted, the right light should be blinking. The outputs are LeftLight and RightLight. When LeftLight is asserted, the left light is on and when RightLight is asserted, the right light is on. Please make sure that your circuitry causes the lights to blink and not simply to be lighted steadily. Furthermore, you will have to implement hazard lights, which cause both the left and the right lights to blink. You may assume that the hazard button asserts both inputs simultaneously, and that you have a clock with the same frequency of the required blinking
    1. Draw the graphical representation for the finite state machine used to implement the turn signal device.
    2. Assign state numbers to the states of the finite state machine you contructed and write a set of logic equations for each of the outputs, including the next state bits.
    3. Specify the PLA resulting from your logic equations.
    4. Show how you would build the finite state machine for this device, using logic gates and D flip-flops.

  2. Construct a 3-bit unary counter using three D flip-flops and a selection of logic gates. (Unary means that n is represented by n ones - that is, 001 equals 1, 011 equals 2, and so on). The inputs to your counter should consist of a signal that resets the counter to 0, called reset, and a signal to increment the counter, called inc. The outputs should be the value of the counter (000, 001, 011, and 111). When the counter has value 3, it should stay in this state until reset. In any state, if the reset input is asserted at the end of the clock cycle, the counter should reset to 0.

    3.  
  3. Show how to build a 32 x 8 SRAM using eight 4 x 8 SRAMs.