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My general interest is in computer architecture and high performance computing. Currently, I am working on architectural techniques to effectively manage caches in chip multiprocessors.
Publications:
- Mohammad Hammoud, Sangyeun Cho, and Rami Melhem, C-AMTE: A Location Mechanism for Flexible Cache Management in Chip Multiprocessors. Journal of parallel and Distributed Computing (JPDC), To appear. (pdf)
- Mohammad Hammoud, Sangyeun Cho, and Rami Melhem, Cache Equalizer: A Placement Mechanism for Chip Multiprocessor Distributed Shared Caches. Proceedings of the 6th Int'l Conference on High Performance and Embedded Architectures and Compilers (HiPEAC), Heraklion, Crete, Greece, January 2011. (pdf)
- Mohammad Hammoud, Hardware-Oriented Cache Management for Large-Scale Chip Multiprocessors. PhD Dissertation, August 2010. (pdf)
- Mohammad Hammoud, Sangyeun Cho, and Rami Melhem, A Dynamic Pressure-Aware Associative Placement Strategy for Large Scale Chip Multiprocessors. IEEE Computer Architecture Letters (CAL), January-June 2010. (pdf)
- Mohammad Hammoud, Sangyeun Cho, and Rami Melhem, Dynamic Cache Clustering for Chip Multiprocessors. Proceedings of the ACM Int'l Conference on Supercomputing (ICS), IBM T. J. Watson Research Center, New York, June 2009. (pdf)
- Mohammad Hammoud, Sangyeun Cho, and Rami Melhem, ACM: An Efficient Approach for Managing Shared Caches in Chip Multiprocessors. In Proceedings of the 4th Int'l Conference on High Performance and Embedded Architectures and Compilers (HiPEAC) , Paphos, Cyprus, January 2009. (pdf)
- Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad H. Hammoud and Rami Melhem. CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications. In IEEE Int'l Symposium on Performance Analysis of Systems and Software (ISPASS), San Jose, California, April 2007. (pdf) (ppt)