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Current
research interests:
 My
research interests are in designing efficient IP packet processing hardware
engines. This falls into two categories: computer architecture and network hardware
(such as routers). Currently, I am a part of an NSF-funded research group
that is working on a promising set associative memory architecture that is
called Content Addressable Random access Memory or CA-RAM.
The CA-RAM architecture is simply a specialized memory architecture that
can be used to pursue high-speed search operations for search intensive
applications such as IP forwarding, packet filtering, speech recognition
…etc. However, we are involved more with the network-based applications. We
have two faculties in this team; Prof. Rami Melhem and Prof. Sangyeun Cho
in addition to me and one more graduate student, Socrates Demetriades.
The
CA-RAM is a high speed, power efficient, high capacity and cheap
memory-based network processing hardware that can easily replace the
current prevailing technology which is called Ternary Content Addressable
Memory or TCAM. TCAM has been long used as a network processing hardware.
Nevertheless, TCAM has its own set of limitations: high power consumption,
poor scalability, and low bit density.
I
am also interested to find fast and simple hash schemes for hardware
implementation. These schemes will help the
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Previous
Research interests:
I - Real-Time
Systems
I
used to work in real-time analysis of computer networks. I did my masters
at Cairo University in one of the most famous fieldbus protocols which is
called WorldFIP
(Factory Instrumentation Protocol). We developed a model to evaluate the
Worst Case Response Time (WCRT) of the FIP Asynchronous messages. This
model extends the old known models in many aspects. Usually research in WorldFIP
concentrate on one type of asynchronous messages; namely the Urgent Asynchronous,
while in our model we dealt with the other asynchronous messages, Normal, and also
other lower priority traffic. We verified our model using simulations.
We
also applied our model over one application over the digital-control
system. We came up with an algorithm that guaranteed the stability of a
closed-loop digital-control system.
Here
is my M.S. Thesis:"Real-Time Analysis
of FIP-Based Systems":
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