assert_odd_parity

Ensures that the value of a specified expression has odd parity.


	Parameters: severity_level width property_type msg coverage_level	Class: single-cycle assertion

Syntax

assert_odd_parity

		[#(severity_level, width, property_type, msg, coverage_level )]

		instance_name (clk, reset_n, test_expr );

Parameters


	severity_level	Severity of the failure. Default: ‘OVL_ERROR.
	width	Width of the test_expr argument. Default: 1.
	property_type	Property type. Default: ‘OVL_ASSERT.
	msg	Error message printed when assertion fails. Default: “VIOLATION”.
	coverage_level	Coverage level. Default: ‘OVL_COVER_ALL.

Ports


clk		Clock event for the assertion. The checker samples on the rising edge of the clock.
reset_n		Active low synchronous reset signal indicating completed initialization.
test_expr	[ width - 1: 0 ]	Expression that should evaluate to a value with odd parity on the rising clock edge.

Description

The assert_odd_parity assertion checker checks the expression test_expr at each rising edge of clk to verify the expression evaluates to a value that has odd parity. A value has odd parity if the number of bits set to 1 is odd.

The checker is useful for verifying control circuits, for example, it can be used to verify a finite-state machine with error detection. In a datapath circuit the checker can perform parity error checking of address and data buses.

Assertion Check


	ASSERT_ODD_PARITY	Expression evaluated to a value whose parity is not odd.

Cover Point


	test_expr_change	Expression has changed value.

Example


assert_odd_parity #(
	‘OVL_ERROR, 8, ‘OVL_ASSERT, “Error: data has even parity”, ‘OVL_COVER_ALL)		// severity_level // width // property_type // msg // coverage_level
	valid_data_odd_parity (
		clk, reset_n, data );	// clock // reset // test_expr

Ensures that data has odd parity at each rising edge of clk.

Standard OVL V1.1a