Selected technical publications grouped into seven areas.
1. VLSI arrays for Signal/Image Processing:
H. Y. H. Chuang and L. Chen, "VLSI Architecture for Fast 2-D Discrete
Orthonormal Wavelet Transform", Journal of VLSI Signal Processing,
vol. 10, pp. 225-236, 1995.
postscript file
L. Chen and H. Y. H. Chuang, " Designing Systolic Architectures for
Complete Euclidean Distance Transform", Journal of VLSI Signal Processing
vol 10, pp. 169-179, 1995.
H. Y. H. Chuang and L. Chen, "Scalable VLSI Parallel Pipelined Architecture
for Discrete Wavelet Transform", Proc. SPIE Intern. Symp. Optical Tools for
Manufacturing and Advanced Automation: Machine Vision Applications,
Architecture, and Systems Integration II, pp. 66-73 Sept. 1993.
L. Chen and H. Y. H. Chuang "Systolic Array for Complete Euclidean Distance
Transform", Proc. SPIE Intern. Symp. Optical Tools for Manufacturing and
Advanced Automation: Machine Vision Applications, Architecture, and
Systems Integration II, pp. 107-113, Sept. 1993.
H. Y. H. Chuang, H. Kim, and C. C. Li, "Systolic Architecture for Discrete
Wavelet Transforms." Proc. SPIE/IS&T Symp. on Electronic Imaging:
Science and Technology, Vol. 1659, pp. 48-53, Feb. 1992.
H. Y. H. Chuang, J. Kim, and C. C. Li, "Systolic Architecture for Discrete
Wavelet Transforms with Orthogonal Bases", Proc. SPIE Conf. on
Applications of Artificial Intelligence X: Machine Vision and Robotics,
Vol. 1708, pp. 157-164, April 1992.
H. Y. H. Chuang and C. C. Li, "A Systolic Array Processor for Straight Line
Detection by Modified Hough Transform", Proc. of IEEE Workshop on Computer
Architecture for Pattern Analysis and Image Database Management,
pp. 300-304, Nov., 1985.
2. Systolic Arrays for Matrix Operations:
H. Y. H. Chuang, L. Chen, and D Quan "A Size-independent Systolic Array
for Matrix Triangularization and Eigenvalue Computation",
Journal of Circuits, Systems, and Signal Processing.
Special Issue on Array Processing, pp. 173-189, Feb., 1988.
H. Y. H. Chuang and L. Chen "Size-independent Systolic Arrays for
Eigenvalue Problems", Proc. of International Conf. on Parallel Processing,
pp. 550-556, Aug., 1987
H. Y. H. Chuang and Guo He, "A Versatile Systolic Array for Matrix
Computations," Proc. International Symposium on
Computer Architecture, pp. 315-322, June, 1985.
3. Parallel Signal/image Processing Algorithms:
L. Chen and H. Y. H. Chuang, " An Efficient Algorithm for Complete
Euclidean Distance Transform on Mesh-connected SIMD", Parallel Computing
vol. 21, pp. 841-852, 1995.
H. Y. H. Chuang and Ling Chen, "SIMD Hypercube Algorithms for Complete
Euclidean Distance Transform", Proc. First Intern. Conf. on Algorithms and
Architectures for Parallel Processing, pp. 874-877, April, 1995.
L. Chen and H. Y. H. Chuang, "SIMD Hypercube Algorithms for Complete
Euclidean Distance Transform", Dept. of Computer Science Tech. Report 95-21.
H. Y. H. Chuang and L. Chen, "An Efficient Hough Transform on SIMD
Hypercube", Proc. Intern. Conf. on Parallel and Distributed Systems, pp.
236-241, Dec., 1994.
L. Chen and H. Y. H. Chuang, "A Fast Algorithm for Euclidean Distance Maps
of a 2-D Binary Image", Information Processing Letters, 51 (1994), pp.
25-29.
Y. Pan and H. Y. H. Chuang, " Faster Line Detection Algorithms on Enhanced
Mesh-Connected Arrays," Proc. IEE., Vol. 140, No. 2 pp. 95-100, March, 1993
C. S. Kannan and H. Y. H. Chuang, "Fast Hough Transform on a Mesh Connected
Processor Array," Information Processing Letters, Vol. 33(5), Jan., 1990.
Y. Pan and H. Y. H. Chuang, "Parallel Hough Transform Algorithms on SIMD
Hypercube Arrays," Proc. 1990 Intern. Conf. on Parallel Processing.
Y. Pan and H. Y. H. Chuang, "Improved Mesh Algorithms for Straight Line
Detection", Proc. Third Symp. on the Frontiers of
Massively Parallel Computation, 1990.
C. S. Kannan and H. Y. H. Chuang, "Fast Hough Transform on a Mesh Connected
Processor Array", Proc. 1987 SPIE Conf.: Intelligent Robots and Computer
Vision, Nov., 1987.
4. Parallel Matrix Operation Algorithms:
Y. Pan and H. Y. H. Chuang, "Computations for Some Matrix and Graph
Problems on The Block Shift Networks", Proc. Conf. on High Performance
Computing, pp. 314-319, April 1994.
Y. Pan and H. Y. H. Chuang, "Singular Value
Decomposition on SIMD Hypercube and Shuffle-Exchange Computers,"
Computers and Mathematics with Applications, Vol. 24, No. 4., pp. 23-32,
April, 1992.
H. Y. H. Chuang and L. Chen, "Efficient Computation of the Singular Value
Decomposition on Cube Connected SIMD Machine",
Proc. Supercomputing-89, Nov., 1989.
H. Y. H. Chuang and L. Chen, "Solving Large SVD Problems in Cube Connected
SIMD Machines", Proc. Third Pan Pacific Computer Conference, pp. 1264-1267,
Aug., 1989.
5. Systolic Array Design Methods:
H. Y. H. Chuang and L. Chen, "Systematic Design of Systolic Arrays from
Affine Recurrence Equations", Dept. of Computer Science Tech. Report 95-23.
H. Y. H. Chuang and L. Chen, " A General Approach to Solving Arbitrarily
Large Problems in a Fixed Size Systolic Array", Proc. 21-st Hawaii
International Conf. on System Sciences, pp. 195-204, Jan., 1988.
H. Y. H. Chuang and L. Chen, " Mapping Loop Algorithms into Reconfigurable
Mesh connected Processor Array ", Proc. 21-st Hawaii International Conf. on
System Sciences, pp. 294-300, Jan., 1988.
H. Y. H. Chuang and Guo He, "Design of Problem-size Independent Systolic
Array Systems", Proc. International Conference on Computer Design:
VLSI in Computers, pp. 152-157, Oct., 1984.
6. Distributed Systems/Interconnection Networks:
Y, Pan and H. Y. H. Chuang, "Properties and Performance of The Block Shift
Network," IEEE Trans. on Circuits and Systems, Part 1: Fundamental Theory and Applications,
Vol. 44, No. 2, pp. 93-102, Feb., 1997.
Y. Pan and H. Y. H. Chuang, "Block Shift Network: A New Interconnection
Network for Efficient Parallel Computation," Proc. 1991 Intern. Conf. on
Parallel Processing.
Y. Pan and H. Y. H. Chuang, "Simulation of "Hot Spot" Problem and Its
Solutions in Message-Based Distributed Systems", Proc. International
Conf. on System Simulation and Scientific Computing, Beijing, Aug., 1989.
Y. Pan and H. Y. H. Chuang, "Simulation of "Hot Spot" Problem and Its
Solutions in Message-Based Distributed Systems," Proc. 12th Annual Pittsburgh
Conf. on Modeling and Simulation, pp. 1061-1065, May, 1989.
7. Fault-tolerant Computing
H. Y. H. Chuang, "Analysis of Recovery Block Schemes with Internal
Error Detection," Proc. 1980 International Computer Symposium,
pp. 724-730, Dec., 1980.
H. Koh and H. Y. H. Chuang, "Finding a Minimal Set of Base Paths
of a Program," International Journal of Computer and Information
Science, pp. 473-488, Dec., 1979.
H. Y. H. Chuang, "Safety and Reliability Analysis of Computer Systems,"
Proc. 1978 International Computer Symposium, Dec., 1978.
H. Y. H. Chuang and S. Das, "Design of Fail-safe Sequential Machines
Using Separable Codes," IEEE Transaction on Computers, Vol. C-27,
No. 3, pp. 249-254, March 1978.
H. Koh and H. Y. H. Chuang, "An Approach to Finding a Minimal Set of
Base Paths of a Program," Proc. 6th Texas Conference on Computing
Systems, Nov. 1977.
H. Y. H. Chuang, "Fail-safe Asynchronous Machines with Multiple Input
Changes," IEEE Transaction on Computers, Special Issue on
Fault-tolerant Computing, pp. 637-642, June 1976.
H. Y. H. Chuang and D. K. Chou, "Reliability Analysis of Systems with
Self-checking Checkers and Fail-safe Output," Proc. 4th Milwaukee
Symposium on Automatic Computation and Control, pp. 407-412, April 1976.
H. Y. H. Chuang and D. K. Chou, "Availability of System with Dynamic
Checkers and Fail-safe Output," Fourth Annual Computer Science Conf.,
Anaheim, CA. Feb. 1976
L. L. Wang and H. Y. H. Chuang, "A Design Method for Fail-safe
Synchronous Machines," Proc. International Computer Symposium,
Taipei, Taiwan, pp. 236-241, Aug., 1975.
H. Y. H. Chuang, "Fail-safe Asynchronous Machines with Multiple Input
Changes," Digest of International Symposium on Fault-tolerant
Computing, Paris, France, pp. 124-129, June 1975.
L. L. Wang and H. Y. H. Chuang, "On Improvement of Fail-safe Synchronous
Machine Design Using On-set Realization," Digest of International
Symposium on Fault-tolerant Computing, Paris, France, p. 255, June 1975.
W. M. Conner and H. Y. H. Chuang, "Reliability Modeling of a Fault
Restoration Scheme," Proc. 6th Annual Pittsburgh Conference on
Modeling and Simulation, pp. 595-599, April 1975.
L. L. Mate, S. Das, and H. Y. H. Chuang, "A Logic Hazard Detection and
Elimination Method," Information and Control, Vol. 26, No.4, pp. 351-368.
S. Das and H. Y. H. Chuang, "A Unified Approach to the Realization of
Fail-safe sequential Machines," Digest of International Symposium
on Fault-Tolerant Computing, Champaign, IL, pp. 3-2 to 3-6, June 1974.
H. Y. H. Chuang and S. Das, "An Approach to the Design of Highly
Reliable and Fail-safe Digital Systems," Proc. of 1974 National
Computer Conference, pp. 637-642.
S. Das and H. Y. H. Chuang, "On the Design of Reliable and Fail-safe
Digital Systems Using Multiple Valued Logic," Proc. International
Symposium on Multiple-Valued Logic, Morgantown, WV, pp. 183-206, May 1974.
H. Y. H. Chuang and S. Das, "Synthesis of Multiple-Input Change
Asynchronous Machines Using Controlled Excitation and Flip-flops,"
IEEE Trans. on Computers, Vol. C-22, No. 12, pp. 1103-1109, Dec., 1973.
S. Das and H. Y. H. Chuang, "On Improved Fail-safe Logic," Proc. of 2nd
Texas Conference on Computing Systems, Austin, TX, pp. 32-1 to 32-5, 1973.
S. Das and Y. H. Chuang, "Fault Restoration Using N-fail-safe Logic,"
Proc. of IEEE, Vol. 60, No. 3, pp. 334-335, March 1972.
S. R. Vishnubhotla and Y. H. Chuang, "A Theory and a Procedure for the
Detection of Multiple Faults in Combinational Circuits," Proc. of
10th Allerton Conference on Circuit and System Theory, Monticello,
IL, pp. 133-142, Oct., 1972.
S. R. Vishnubhotla and Y. H. Chuang, "A Path Analysis Approach to the
Diagnosis of Combinational Circuits," Proc. of SHARE-ACM-IEEE Design
Automation Workshop, Atlantic City, NJ, pp. 222-230, June 1971.