My research activities in parallel architectures are in 
<p>
<BR>

<IMG ALT="*" SRC="Gif2/blueball.gif"> VLSI array architectures for signal/image processing operations
<BR> 
<p>
<IMG ALT="*" SRC="Gif2/blueball.gif"> VLSI array architectures for matrix operations
<BR>
<p>

<IMG ALT="*" SRC="Gif2/blueball.gif"> Systolic array design methods
<BR>
<p>
Please see "Publications" for selected papers.