LCTES 2010

ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems

Stockholm, Sweden
April 12-16, 2010
in conjunction with CPS Week 2010

Important Dates

Abstracts due:
October 10, 2009, 11:59pm PST
Papers due:
October 17, 2009, 11:59pm PST
Authors notified:
December 7, 2009
Camera-ready version due:
January 28, 2010
WiP-PS due:
February 17, 2010
Early registration due:
March 1, 2010

LCTES 2010 Program

  • Tuesday, April 13
    • 08:45 - 09:00 CPS Week Opening Remarks
    • 09:00 - 10:00 CPS Week Plenary Talk
    • 10:00 - 10:30 Coffee Break
    • 10:30 - 12:00 Memory Systems
      • Analysis and Approximation for Bank Selection Instruction Minimization on Partitioned Memory Architecture
        Minming Li, Yingchao Zhao, Tiantian Liu and Chun Jason Xue
      • Versatile System-level Memory-aware Platform Description Approach for Embedded MPSoCs
        Robert Pyka, Felipe Klein, Peter Marwedel and Stylianos Mamagkakis
      • Operation and Data Mapping for CGRAs with Multi-bank Memory
        Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee M. Youn and Yunheung Paek
    • 12:00 - 13:30 Lunch
    • 13:30 - 15:00 Streaming and Synchronous Languages
      • Look Into Details: The Benefits of Fine-Grain Streaming Buffer Analysis
        Mohammad H. Foroozannejad, Matin Hashemi, Trevor Hodges and Soheil Ghiasi
      • Modeling Structured Event Streams in System Level Performance Analysis
        Simon Perathoner, Tobias Rein, Lothar Thiele, Kai Lampka and Jonas Rox
      • Translating Concurrent Action Oriented Specifications to Synchronous Guarded Actions
        Jens Brandt, Sandeep K. Shukla and Klaus Schneider
    • 15:00 - 15:30 Coffee Break
    • 15:30 - 17:00 Work-in-Progress Session
    • 17:00 - 17:30 Break
    • 17:30 - 19:30 CPS Week Reception with Posters/Demos
  • Wednesday, April 14
    • 09:00 - 10:00 CPS Week Plenary Talk
    • 10:00 - 10:30 Coffee Break
    • 10:30 - 12:00 Synthesis, Timing Analysis and Design Exploration
      • Contracts for Modular Discrete Controller Synthesis
        Gwenaël Delaval, Hervé Marchand and Eric Rutten
      • Semi-Automatic Derivation of Timing Models for WCET Analysis
        Marc Schlickling and Markus Pister
      • Design Exploration and Automatic TLM generation of Kahn Process Networks for Multicore Platforms
        Ines Viskic, Lochi Yu and Daniel D. Gajski
    • 12:00 - 13:30 Lunch
    • 13:30 - 15:00 Invited Talk: Dr. Jong-Deok Choi, Samsung
    • 15:00 - 15:30 Coffee Break
    • 15:30 - 17:00 Compiler Techniques
      • Compiler Directed Communication Reliability Enhancement for Chip Multiprocessors
        Mahmut Kandemir, Ozcan Ozturk, Sri Hari Krishna Narayanan and Mary Jane Irwin
      • Improving Both the Performance Benefits and Speed of Optimization Phase Sequence Searches
        Prasad Kulkarni and David Whalley
      • An Efficient Code Update Scheme for DSP Applications in Mobile Embedded Systems
        Weijia Li and Youtao Zhang
    • 19:00 - 22:00 CPS Week Banquet
  • Thursday, April 15
    • 09:00 - 10:00 CPS Week Plenary Talk
    • 10:00 - 10:30 Coffee Break
    • 10:30 - 12:00 Design Frameworks and Tools
      • Elastic Computing: A Framework for Transparent, Portable, and Adaptive Multi-core Heterogeneous Computing
        John Wernsing and Greg Stitt
      • Integrating Safety Analysis into the Model-based Development Toolchain of Automotive Embedded Systems
        Matthias Biehl, DeJiu Chen and Martin Törngren
      • Sampling-based Execution Monitoring
        Sebastian Fischmeister and Yanmeng Ba
    • 12:00 - 13:30 Lunch
    • 13:30 - 15:00 Invited Talk: Dr. Vivek Sarkar, Rice University
    • 15:00 - 15:30 Coffee Break
    • 15:30 - 17:00 Caching and Buffer Management
      • Cache Vulnerability Equations for Protecting Data in Processor Caches from Soft Errors
        Aviral Shrivastava, Jongeun Lee and Reiley Jeyapaul
      • Resilience Analysis: Refinement of the CRPD Bound for Set-Associative Caches
        Sebastian Altmeyer, Claire Burguiere and Jan Reineke
      • RNFTL: A Reuse-Aware NAND Flash Translation Layer for Flash Memory
        Yi Wang Duo Liu, Meng Wang, Zhiwei Qin and Zili Shao

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