PhD Proposal

Dynamic Binary Translation for Embedded Systems with Scratchpad Memory

Jose A. Baiocchi Paredes

Monday June 1, 2009
2:00 pm - SENSQ 6329 Board Room

Abstract

Advances in embedded computing currently allow a single embedded processor to execute more demanding applications and also simultaneously handle several tasks previously in charge of many specialized processors. New development models have enabled distribution of software for embedded devices through the Internet, often from third-parties. Thus, in addition to traditional embedded system design constraints (i.e., performance, memory capacity, real-time guarantees and energy consumption) throughput and security concerns are now important.

Dynamic binary translation (DBT) has been used to address these issues in general-purpose systems, through services such as virtualization, just-in-time compilation, dynamic optimization, adaptive power management and code integrity protection. However, the adoption of DBT in the embedded domain remains limited due to excessive performance, memory and power overhead that its use may impose on systems with scarce hardware and energy resources.

Many embedded devices incorporate scratchpad memory, a fast on-chip SRAM, as a replacement or complement to traditional hardware caches. A scratchpad memory and a hardware cache have similar access latencies. However, the scratchpad memory uses less chip area, has lower power consumption and provides better real-time guarantees. The scratchpad memory is exposed as part of the physical address space, so it must be explicitly managed by software. Thus, effectively exploiting the scratchpad memory can help to reduce the overhead caused by DBT.

This research will address the challenges faced by DBT for embedded systems and develop novel algorithms and techniques to enable the use of DBT in the embedded systems domain. The DBT techniques developed in this research (e.g., incremental code loading, translated code footprint reduction, non-preemptive multi-tasking, heterogeneous memory management) will be integrated into an extensible framework. The framework, called StrataX, will help in research and development of novel DBT-based services for embedded software (e.g., on-demand code decryption/decompression, software memory protection). An implementation of the framework, that will serve as a lightweight executive for systems-on-chip with scratchpad memory, will be among the contributions of this work.

Dissertation Adviser

Dr. Dr. Bruce Childers, Department of Computer Science

Committee Members

Dr. Sangyeun Cho, Department of Computer Science

Dr. Youtao Zhang, Department of Computer Science

Dr. Jack Davidson, Department of Computer Science, University of Virginia